搜索资源列表
MSP430C
- 用FPGA实现JPEG的Verilog源代码-JPEG with the FPGA implementation of the Verilog source code
jpeg_verilog
- Jpeg压缩的Verilog代码，小图片-Jpeg compression of the Verilog code
djpeg
- JPEG解码的Verilog源码，适合于了解JPEG的算法。-JPEG decoding of Verilog source code, for understanding the JPEG algorithm.
81
- 一个关于ＪＰＥＧ的例子，是用Verilog编写的，可以综合。-A case of JPEG is written in Verilog, can be integrated.
jpegencode_latest.tar
- 完整的用VERILOG语言开发的图像压缩器代码，欢迎分享。-A jpeg encode source code based on verilog
DDDCCT_IDCTi
- 离散余弦变换及反离散余弦变换的HDL代码及测试文件。包含VHDL及及Verilog版本。可用途JPEG及MEPG压缩算法 已通过测试。 -The discrete cosine transform and inverse discrete cosine transform HDL code and test files. Contains VHDL and Verilog versions. Can use JPEG and MEPG compression of algorithm has
dct2d
- this program is written in verilog compute the dct transform of an image used for jpeg and other image compression methods-this program is written in verilog compute the dct transform of an image used for jpeg and other image compression methods
jpegencode_latest.tar
- fpga verilog 实现jpeg ip核编码器-fpga verilog forjpeg encode ipcore
jpeg_encoder
- JPEG 编码器IP核，用verilog语言编写，不支持二级采样。-JPEG Encoder IP Core,The core is written in Verilog and is designed to be portable to any target device. This core does not perform subsampling- the resulting JPEG image will have 4:4:4 subsampling
dct8x8
- 全流水线1维8点DCT变换，用于JPEG编码，无乘法运算,verilog-Full-line one-dimensional 8-point DCT, for JPEG encoding, no multiplication
jpegencode
- Verilog源码，实现jpeg图片的编解码,内附代码说明文档。-verilog source code to realize the encodeing and decodeing for JPEG
JPEG_Encoder_Verilog_Code
- 完整的JPEG解压缩代码，使用verilog编写的源程序-Complete JPEG decompression code，Prepared using verilog source
jpegencode_latest.tar
- jpeg压缩编码电路，verilog编写，可以综合。-jpeg compression coding circuit, verilog writing can be integrated.
dct
- DCT 2d for JPEG in verilog